Download Arithmetic Built-In Self-Test for Embedded Systems by Janusz Rajski PDF

By Janusz Rajski

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Example text

The operation of LFSR can be described by a rather complex algebra of polynomials. The interested reader may refer for further details to [2], [16]. If an LFSR is initialized to a nonzero value, then it can cycle through a number of states before coming back to the initial state. A polynomial which causes an n-bit LFSR to go through all possible 2n — 1 nonzero states is called a primitive characteristic polynomial A corresponding LFSR is often referred to as a maximum-length LFSR, while the resultant sequence is termed a maximumlength sequence or m-sequence.

17: Basic BIST architectures. The next BIST planning procedure pertains to grouping similar modules and sharing BIST resources. Its basic objective is to reduce redundancy and unnec­ essary area and performance overhead. Grouping of random logic modules may reduce the number of nodes needed to control and observe. Similarly, sharing BIST circuitry, especially for regular structures of the same type though with nonidentical sizes, may significantly reduce the area overhead. This approach, however, can increase test application time, particularly when individual output data compaction is required.

5. 17: Basic BIST architectures. The next BIST planning procedure pertains to grouping similar modules and sharing BIST resources. Its basic objective is to reduce redundancy and unnec­ essary area and performance overhead. Grouping of random logic modules may reduce the number of nodes needed to control and observe. Similarly, sharing BIST circuitry, especially for regular structures of the same type though with nonidentical sizes, may significantly reduce the area overhead. This approach, however, can increase test application time, particularly when individual output data compaction is required.

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